What is the advantage of ZDS-NS ADC in motor current detection?

Episode 11. Introducing advantages of ZDS-NS ADC in motor current detection.

This is a story that young A, who works in a fictional motor company deepens the knowledge of ADCs with a senior colleague K, and his boss, M, manager.

Senior K

As I mentioned earlier, since the isolated ADC when using the shunt resistor is a delta-sigma modulator, the digital filter of the output stage rate limits the responsiveness. On the other hand, the combination of the AKM current sensor and the ZDS-NS ADC remarkably improved the responsiveness, correct? Here is each A/D conversion result when a current step wave is actually input. (Figure 1)

Figure 1. Output Comparison of when Inputting A Current Step Wave

Young A

Wow, it is completely different! This is a 3rd order SINC filter. Well, the smaller the OSR is, the less rounded the waveform is.

Senior K

This is the bandwidth difference of the digital filter.

Young A

From the point of view of responsiveness, it is clear that ZDS-NS type is advantageous compared to delta-sigma type. But what is the comparison with SAR type? Isn't it equivalent response?

Expert M Manager

Oversampling is very important in motor current detection, so if the responsiveness is the same, the ZDS-NS ADC is overwhelmingly advantageous over the SAR ADC.

Young A

Why is oversampling important for motor current detection?

Expert M Manager

Switching noise is always on the U/V/W current line of the motor when the inverter is PWM switched. A delta-sigma ADC of the oversampling type is effective to suppress this kind of noise.

Young A

I see, since SAR ADC samples only one point, does it mean that it is susceptible to noise? (Figure 2)

With the ZDS-NS ADC, it can cope with the trend of higher speed in motor current detection while having switching noise reduction effect like delta-sigma ADC. I definitely would like to try it!

Figure 2. Motor Current Wave and Comparison of Each ADC Operation

Senior K

By the way, there is a similar product called the AK9255 and the AK9255A as ZDS-NS ADC.

Young A

Indeed. They are the same 16-bit ADC, but the AK9255 is at 1MHz speed, and the AK9255A is at 540kHz. There is a difference in, "latency". ... What is latency? (Figure 3)

Figure 3. Timing Diagram of the AK9255/AK9255A

Expert M Manager

Latency is also a delay in A/D conversion data output, but it is a fixed amount of delay due to ADC conversion. It is a value that shows how long it is taking the sampling data is output from the ADC and how many times it will be delayed with reference to the conversion cycle. It is similar to the pipeline delay of a pipelined ADC.

Young A

Ah, Okay.

Expert M Manager

As for AK9255A or 56A, like zero clock latency, A/D conversion result is output from the SDO pin after completion of A/D conversion if continuing to input SCLK after CSL signal falls that is a conversion trigger signal. It is an image that immediate output is possible. On the other hand, if the latency is 1 as in the AK9255 or AK9256, the A/D conversion result is output from the SDO pin after inputting the next CSN falling edge.

Young A

I figured out when I saw the figure. If there is 1 latency, it is data conversion at the first CSN and data output at the second CSN. How do you use it properly?

Senior K

For example, when intermittent operation is required, zero latency is essential. On the other hand, if you are continuing to convert at 1 MHz, even if there is 1 latency, it will be unlikely hinder data capture.

Young A

What is intermittent operation?

Senior K

Use it when you want to convert data occasionally with arbitrary timing instead of keeping converting all the time, but also want to shorten the conversion time. Speaking of the ZDS-NS ADC, input the maximum speed of 20 MHz to SCLK related to the conversion time, input a sufficiently slow frequency, for example 10 kHz, to the CSN related to the output rate and let it operate at low speed.

Expert M Manager

Motor current detection is exactly the case. Since the output rate is matched with the PWM control cycle, 10 kHz, 100 microsecond cycle may be sufficient, but it is the case that the A/D conversion result is required in several microseconds from the start of conversion. In this case, it would be good to input 10 kHz for CSN and 20 MHz for SCLK. (Figure 3)

Young A

Certainly, in the case of AK9255/56, the "N" th conversion data will not be available immediately. It seems better to have zero latency like the AK9255A/56A for intermittent operation.